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MarAzul said:
True, but you could use it to run Windows XP and 8 along with Linux. The only time processor get slowed down is contention for the same resource and that is totally dependent on the work load. My old product, IMS Fastpath was specifically designed to exploit Multiple engines accessing the same data every transaction, Point of sale banking , Federal Reserve money control and 800 number telephone control to name a few. So the coding of the data and transaction managers was critical. Even the Application data handling techniques are special.

Ha! If the OBama exchange people had any clue of just how special it gets.
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No, you can't use it to run XP along with Linux. The 1000 cores in these FPGAs have limited instruction sets. The Intel CPUs running Windows or Linux have on the order of hundreds or thousands of instructions in their instruction sets. Each CPU core (and hyperthread) has all those instructions available.

The FGPA might have 25 per "core." The "cores" also have limited amount of memory, likely on the order of 1MB or less each. Quite likely much much less. And they are not at all accessing the same data or doing transactions.

What they're doing is very specific and limited tasks using the FPGA.

Today, Google has countless "engines" accessing the same data every transaction. The engines would be their servers, the data would be the set to obtain search results from.
 
Denny Crane said:
No, you can't use it to run XP along with Linux. The 1000 cores in these FPGAs have limited instruction sets. The Intel CPUs running Windows or Linux have on the order of hundreds or thousands of instructions in their instruction sets. Each CPU core (and hyperthread) has all those instructions available.

The FGPA might have 25 per "core." The "cores" also have limited amount of memory, likely on the order of 1MB or less each. Quite likely much much less. And they are not at all accessing the same data or doing transactions.

What they're doing is very specific and limited tasks using the FPGA.

Today, Google has countless "engines" accessing the same data every transaction. The engines would be their servers, the data would be the set to obtain search results from.
Click to expand...

Limited instruction sets huh, Sounds pretty uninteresting. Where did this idea of calling multiple
linked servers "cores"? Private Computer networks have been around for about 50 years, very common for 40.

I don't know since I am out of the business now except for my own purposes, but I think of multiple processor computers being tightly coupled processors, coupled by their common memory. Cores being the same except being packaged a single unit, probably under a common heat exchanger cap.
Closely coupled would be computers (uni or MP) coupled by common memory beyond directly
accessible cache, RAM, SSD, Hardrives or whatever. Loosely coupled by links even fast black light links is a network Referring to all of the processors possible in a network as cores is a failure to communicate
 
I looked into the 1000 Cores claim and they built a dedicated CPU for compressing MPEG video. As I said, it wasn't general purpose. There are a number of CPU configurations you can program on these FPGA chips, the most complex is a dual core ARM 9 CPU, which is a RISC (reduced instruction set computer) architecture. The most of those you can fit on an FPGA is 2 cores that I can see, but with some room left over for more functionality. And they run at 200MHz.

They do have much lesser powered Harvard Architecture CPUs you can program onto an FPGA. The most I saw mentioned was 24. A far cry from 1000. And these also run at 200MHz, way slower than most desktop CPUs of the past 15 years or so.

The Maui Supercomputer Center had a machine with 512 (or maybe it was 256) Intel CPUs, built by IBM. It ran Linux. I'd say that they wouldn't build such a beast if it wasn't technically a good idea.

http://arstechnica.com/information-...e-worlds-fastest-supercomputers-in-its-cloud/

Amazon puts 26,496 CPU cores together, builds a Top 100 supercomputer

At nearly 500 teraflop/s, Amazon cloud team makes its fastest supercomputer yet.

(teraflop = trillion floating point operations)

http://www.extremetech.com/extreme/...ights-landing-cpu-for-exascale-supercomputing

Intel has taken the wraps off Knights Landing, its next-gen, up-to-72-core Xeon Phi supercomputing chip. The main change is that Knights Landing will be a standalone processor, rather than a slot-in coprocessor that must be paired with standard Xeon CPU. Furthermore, Knights Landing will have up to 16GB of DRAM 3D stacked on-package, providing up to 500GB/sec of memory bandwidth (along with up to 384GB of DDR4-2400 mainboard memory). Knights Landing will debut in 2015 on Intel’s 14nm process, and with a promise of 3 teraflops (double precision) per socket it will almost certainly be used to build some monster 100+ petaflop x86 supercomputers, and beyond to exascale.

The current version of Xeon Phi (Knights Corner) is a PCIe expansion board with an up-to-61-core Intel MIC (Many Integrated Core) chip. These cores are based on the original P54C Pentium core — just like its stillborn Larrabee predecessor — but with a lot of modern additions, such as 64-bit support and 512-bit vector registers.
 
Denny Crane said:
I looked into the 1000 Cores claim and they built a dedicated CPU for compressing MPEG video. As I said, it wasn't general purpose. There are a number of CPU configurations you can program on these FPGA chips, the most complex is a dual core ARM 9 CPU, which is a RISC (reduced instruction set computer) architecture. The most of those you can fit on an FPGA is 2 cores that I can see, but with some room left over for more functionality. And they run at 200MHz.

They do have much lesser powered Harvard Architecture CPUs you can program onto an FPGA. The most I saw mentioned was 24. A far cry from 1000. And these also run at 200MHz, way slower than most desktop CPUs of the past 15 years or so.

The Maui Supercomputer Center had a machine with 512 (or maybe it was 256) Intel CPUs, built by IBM. It ran Linux. I'd say that they wouldn't build such a beast if it wasn't technically a good idea.

http://arstechnica.com/information-...e-worlds-fastest-supercomputers-in-its-cloud/

Amazon puts 26,496 CPU cores together, builds a Top 100 supercomputer

At nearly 500 teraflop/s, Amazon cloud team makes its fastest supercomputer yet.

(teraflop = trillion floating point operations)

http://www.extremetech.com/extreme/...ights-landing-cpu-for-exascale-supercomputing

Intel has taken the wraps off Knights Landing, its next-gen, up-to-72-core Xeon Phi supercomputing chip. The main change is that Knights Landing will be a standalone processor, rather than a slot-in coprocessor that must be paired with standard Xeon CPU. Furthermore, Knights Landing will have up to 16GB of DRAM 3D stacked on-package, providing up to 500GB/sec of memory bandwidth (along with up to 384GB of DDR4-2400 mainboard memory). Knights Landing will debut in 2015 on Intel’s 14nm process, and with a promise of 3 teraflops (double precision) per socket it will almost certainly be used to build some monster 100+ petaflop x86 supercomputers, and beyond to exascale.

The current version of Xeon Phi (Knights Corner) is a PCIe expansion board with an up-to-61-core Intel MIC (Many Integrated Core) chip. These cores are based on the original P54C Pentium core — just like its stillborn Larrabee predecessor — but with a lot of modern additions, such as 64-bit support and 512-bit vector registers.
Click to expand...

Geez, I am sort of glad I really don't need to worry about this stuff anymore. I put together the third generation of computer for my boat. I am please as can be with the thing, a little quad, well not really a quad, a hyper-thread duo. that does everything I need from run radios to navigation. Has 10 serial ports to run gear and the thing that I wanted most, very low power consumption. Clocked out it runs 19 watts connected to 12v power. I really don't need to worry about shunting it down to conserve power. I set it up to hibernate if it isn't doing anything but that isn't necessary.
 
MarAzul said:
Limited instruction sets huh, Sounds pretty uninteresting. Where did this idea of calling multiple
linked servers "cores"?
Click to expand...

I don't know who used it first. But when Intel came out with it's first dual core CPU, I believe it used the term core. Since a CPU can now contain more than one 'engine', you need a new term. Looks like 'core' won out over your 'engine'.

Thus the Private Computer networks have been around for about 50 years, very common for 40.
Click to expand...

Not sure what networking has to do with it?

I don't know since I am out of the business now except for my own purposes, but I think of multiple processor computers being tightly coupled processors, coupled by their common memory.
Click to expand...

I think the definition of MP has moved on, but if that's your definition, there are still very large machines that fit that specific definition.

Cores being the same except being packaged a single unit, probably under a common heat exchanger cap.
Click to expand...

That is not the current commonly accepted definition.

Closely coupled would be computers (uni or MP) coupled by common memory beyond directly
accessible cache, RAM, SSD, Hardrives or whatever. Loosely coupled by links even fast black light links is a network Referring to all of the processors possible in a network as cores is a failure to communicate
Click to expand...

Well, you have only yourself to blame for failure to communicate if you insist on ignoring the commonly understood meaning of technical terms. Admittedly many of these terms are ill-defined or re-defined as technology changes.

barfo
 
barfo said:
I don't know who used it first. But when Intel came out with it's first dual core CPU, I believe it used the term core. Since a CPU can now contain more than one 'engine', you need a new term. Looks like 'core' won out over your 'engine'.

That is not the current commonly accepted definition.

barfo
Click to expand...

Here you go Barfo, I think you will find my use of core matches the "currently accepted use".
Before Intel made the Dual Core processors they had available Mother board made to utilize
Two Xeon processors for an MP sever, which made for a dual engine computer. No need though after building two in the same die under a shared cap, like the Dual Core.

http://en.wikipedia.org/wiki/Multi-core_processor

I tried using one of those Dual Xeon processor in my early experiments for a boat computer.
It worked well enough but the power requirements were fierce so I abandoned that and went with Pentiums, still too much power drain.
 
MarAzul said:
Here you go Barfo, I think you will find my use of core matches the "currently accepted use".
Click to expand...

If you accept that definition, then I don't think we disagree.

I thought you were saying something else - sometimes it's hard to tell.

Actually, I guess it was this that threw me off:

MarAzul said:
Referring to all of the processors possible in a network as cores is a failure to communicate
Click to expand...

What are they if they aren't cores? Do they suddenly become something else if they aren't directly connected to each other?
If Johnny has 4 cores and Mary has 4 cores, together do they have 8 zebras?

barfo
 
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barfo said:
If you accept that definition, then I don't think we disagree.

I thought you were saying something else - sometimes it's hard to tell.

Actually, I guess it was this that threw me off:



What are they if they aren't cores? Do they suddenly become something else if they aren't directly connected to each other?
If Johnny has 4 cores and Mary has 4 cores, together do they have 8 zebras?

barfo
Click to expand...

Well I see your point and correct you are cores are cores. However, if you put two dual cores to work sharing a Hard drive you do not have a quad. so in the same sense nor does sixteen of them push the contention limits I originally was speaking of in the origin study of closely coupled processors. The contention of interest only happen in the primary memory level of shared memory..
 
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Today while I do believe you can get much more processing power out of seven uni processors than you can from a seven core multi processor, it become a ridiculous statement when you consider processing power per watt. We never considered that aspect at all in studying the benefits
of multiprocessor computer years ago. The little pseudo quad in my boat is a marvel in that way,
enough processing power that my battery bank can support.
 
You don't get 100% benefit of each additional core. You get something less than 2x the speed with dual cores.

The article about Amazon's super computer said the theoretical max was 500 teraflops and they got like 480.

There was no diminishing returns .
 
Denny Crane said:
You don't get 100% benefit of each additional core. You get something less than 2x the speed with dual cores.

The article about Amazon's super computer said the theoretical max was 500 teraflops and they got like 480.

There was no diminishing returns .
Click to expand...

You sound quite certain. Do you think that is 100% correct? Or can you conceive of a possible
caveat or two?
 
I'm certain. All of the engineering type literature I read says so.
 
Denny Crane said:
I'm certain. All of the engineering type literature I read says so.
Click to expand...

It seem pretty conflicting to me. In the first line you get something less than one and I know this to be true.

Then you close with "There was no diminishing returns"s.

Just exactly how do you expect both to be true?
 
You FPGA example shows dividing MPEG encoding into 1000 parallel processes is a huge gain.

Most programs aren't written to be parallel, so you get no gain from additional cores. If the program does some background work in threads, you'll see gain, but not 2x.

If you run the program twice (at the same tone) with 2 cores, you'll see near 2x.
 
Denny Crane said:
You FPGA example shows dividing MPEG encoding into 1000 parallel processes is a huge gain.

Most programs aren't written to be parallel, so you get no gain from additional cores. If the program does some background work in threads, you'll see gain, but not 2x.

If you run the program twice (at the same tone) with 2 cores, you'll see near 2x.
Click to expand...

Ok, now we are speaking of manageable sub core parallel processes. Ok, I can see that being a step forward. I imagine quite a few functions could be developed along that line of logic.
 
Denny Crane said:
I looked into the 1000 Cores claim and they built a dedicated CPU for compressing MPEG video. As I said, it wasn't general purpose. There are a number of CPU configurations you can program on these FPGA chips, the most complex is a dual core ARM 9 CPU, which is a RISC (reduced instruction set computer) architecture. The most of those you can fit on an FPGA is 2 cores that I can see, but with some room left over for more functionality. And they run at 200MHz.

They do have much lesser powered Harvard Architecture CPUs you can program onto an FPGA. The most I saw mentioned was 24. A far cry from 1000. And these also run at 200MHz, way slower than most desktop CPUs of the past 15 years or so.

The Maui Supercomputer Center had a machine with 512 (or maybe it was 256) Intel CPUs, built by IBM. It ran Linux. I'd say that they wouldn't build such a beast if it wasn't technically a good idea.

http://arstechnica.com/information-...e-worlds-fastest-supercomputers-in-its-cloud/

Amazon puts 26,496 CPU cores together, builds a Top 100 supercomputer

At nearly 500 teraflop/s, Amazon cloud team makes its fastest supercomputer yet.

(teraflop = trillion floating point operations)

http://www.extremetech.com/extreme/...ights-landing-cpu-for-exascale-supercomputing

Intel has taken the wraps off Knights Landing, its next-gen, up-to-72-core Xeon Phi supercomputing chip. The main change is that Knights Landing will be a standalone processor, rather than a slot-in coprocessor that must be paired with standard Xeon CPU. Furthermore, Knights Landing will have up to 16GB of DRAM 3D stacked on-package, providing up to 500GB/sec of memory bandwidth (along with up to 384GB of DDR4-2400 mainboard memory). Knights Landing will debut in 2015 on Intel’s 14nm process, and with a promise of 3 teraflops (double precision) per socket it will almost certainly be used to build some monster 100+ petaflop x86 supercomputers, and beyond to exascale.

The current version of Xeon Phi (Knights Corner) is a PCIe expansion board with an up-to-61-core Intel MIC (Many Integrated Core) chip. These cores are based on the original P54C Pentium core — just like its stillborn Larrabee predecessor — but with a lot of modern additions, such as 64-bit support and 512-bit vector registers.
Click to expand...

This is a beast of a machine!!!! WOW!
 
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